Texas Instruments TAS3002 Speaker System User Manual


 
6−3
6.3.2 TAS3002 I
2
C Readback Example
The TAS3002 saves in a stack or first-in first-out (FIFO) buffer the last 7 bytes that were sent to it. When an I
2
C read
command is sent to the device (LSB=high), it answers by popping the first byte off the stack. The TAS3002 then
expects either a Send Ack command or an I
2
C Stop command from the host. If a Send Ack command is sent from
the host then the TAS3002 pops another byte off the stack. If an I
2
C Stop is sent then the TAS3002 ends this
transaction. The proper sequence for reading is described as follows:
I
2
C Start
Send I
2
C address byte with read bit set to 1 (LSB set equal to 1)
Receive Byte 0
Send Ack
Receive Byte 1
Send Ack
Receive Byte 2
Send Ack
Receive Byte 3
Send Ack
Receive Byte 4
Send Ack
Receive Byte 5
Send Ack
Receive Byte 6 (if an ACK is sent after byte 6 it locks up the TAS3002)
I
2
C Stop
Where:
I
2
C Start is a valid I
2
C Start command.
Receive Byte is a valid I
2
C command which reads a byte from the TAS3002.
Send Ack is a a valid I
2
C command that informs the TAS3002 that a byte has been read.
I
2
C Stop is a valid I
2
C Stop command.
NOTES: 1. The TAS3002 will appear to be locked up, if a Send Ack is issued after the last byte read. It is required to send an I
2
C Stop command
after the last byte and not a Send Ack.
2. The I
2
C Start and I
2
C Stop commands are the same for both I
2
C read and I
2
C write.
6.3.3 I
2
C Wait States
The TAS3002 device performs interpolation algorithms for its volume and tone controls. If a volume or tone change
is sent to the part via I
2
C, the command sent after the volume or tone (bass and treble) change causes an I
2
C wait
state to occur. This wait state lasts from 41 ms to 231 ms, depending on the system clock rate, the command sent,
and, in the case of bass or treble, the amount of the change.
Secondly, if a long series of commands is sent to the TAS3002 device, it may occasionally create a short wait state
on the order of 150 µs to 300 µs while it loads and processes the commands.
When a sample rate of 32 kHz is used, longer wait states can occur, occasionally up to 15 ms.
The preferred way to take care of wait states is to use an I
2
C controller that recognizes wait states. During the wait
state period, it stops sending data over I
2
C. If this function is not available on the system controller, fixed delays can
be implemented in the system software to ensure that the controller is not trying to send more data while the TAS3002
device is busy. Sending I
2
C data while the TAS3002 device is busy causes errors and locks up the device, which must
then be reset.