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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, TMS320C2802
TMS320C2801, TMS320F28016, TMS320F28015
SPRS230L–OCTOBER 2003–REVISED DECEMBER 2009
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Table 4-12. SPI-C Registers
NAME ADDRESS SIZE (x16) DESCRIPTION
(1)
SPICCR 0x7760 1 SPI-C Configuration Control Register
SPICTL 0x7761 1 SPI-C Operation Control Register
SPISTS 0x7762 1 SPI-C Status Register
SPIBRR 0x7764 1 SPI-C Baud Rate Register
SPIRXEMU 0x7766 1 SPI-C Receive Emulation Buffer Register
SPIRXBUF 0x7767 1 SPI-C Serial Input Buffer Register
SPITXBUF 0x7768 1 SPI-C Serial Output Buffer Register
SPIDAT 0x7769 1 SPI-C Serial Data Register
SPIFFTX 0x776A 1 SPI-C FIFO Transmit Register
SPIFFRX 0x776B 1 SPI-C FIFO Receive Register
SPIFFCT 0x776C 1 SPI-C FIFO Control Register
SPIPRI 0x776F 1 SPI-C Priority Control Register
(1) Registers in this table are mapped to Peripheral Frame 2. This space only allows 16-bit accesses. 32-bit accesses produce undefined
results.
Table 4-13. SPI-D Registers
NAME ADDRESS SIZE (x16) DESCRIPTION
(1)
SPICCR 0x7780 1 SPI-D Configuration Control Register
SPICTL 0x7781 1 SPI-D Operation Control Register
SPISTS 0x7782 1 SPI-D Status Register
SPIBRR 0x7784 1 SPI-D Baud Rate Register
SPIRXEMU 0x7786 1 SPI-D Receive Emulation Buffer Register
SPIRXBUF 0x7787 1 SPI-D Serial Input Buffer Register
SPITXBUF 0x7788 1 SPI-D Serial Output Buffer Register
SPIDAT 0x7789 1 SPI-D Serial Data Register
SPIFFTX 0x778A 1 SPI-D FIFO Transmit Register
SPIFFRX 0x778B 1 SPI-D FIFO Receive Register
SPIFFCT 0x778C 1 SPI-D FIFO Control Register
SPIPRI 0x778F 1 SPI-D Priority Control Register
(1) Registers in this table are mapped to Peripheral Frame 2. This space only allows 16-bit accesses. 32-bit accesses produce undefined
results.
78 Peripherals Copyright © 2003–2009, Texas Instruments Incorporated
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TMS320C2801 TMS320F28016 TMS320F28015