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YMF715E
May 21, 1997
-26-
OPL3 Data Register Array 1 (R/W)
Index D7 D6 D5 D4 D3 D2 D1 D0
00 - 01h LSI TEST
04h - - CONNECTION SEL
05h - - - - - NEW3 * NEW
20 - 35h AM VIB EGT KSR MULT
40 - 55h KSL TL
60 - 75h AR DR
80 - 95h SL RR
A0 - A8h F-NUM (L)
B0 - B8h - - KON BLOCK F-NUM (H)
C0 - C8h * * CHR CHL FB CNT
E0 - F5h - - - - - WS
The bit remarked * indicates that these can be read and written but not effective.
Note :
The wait time of 960ns(min.) is needed before access to OPL3 registers.
9-1-2. Sound Blaster Pro compatibility
The followings are the I/Os for Sound Blaster Pro compatibility.
SB base (R) OPL3 Status port
SB base (W) OPL3 Address port for Register Array 0
SB base + 1h (R/W) OPL3 Data register
SB base + 2h (W) OPL3 Address port for Register Array 1
SB base + 3h (R/W) OPL3 Data port
SB base + 4h (W) SB Mixer Address port
SB base + 5h (R/W) SB Mixer Data port
SB base + 6h (W) DSP Reset port
SB base + 8h (R) OPL3 Status port
SB base + 8h (W) OPL3 Address port for Register Array 0
SB base + 9h (R/W) OPL3 Data port
SB base + Ah (R) DSP Read Data port
SB base + Ch (R) DSP Write-buffer status port
SB base + Ch (W) DSP Write Command/Data port
SB base + Eh (R) DSP Read-buffer status port