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TMS320F2809, TMS320F2808, TMS320F2806
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TMS320C2801, TMS320F28016, TMS320F28015
SPRS230L–OCTOBER 2003–REVISED DECEMBER 2009
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6-9 XCLKIN Timing Requirements - PLL Enabled ............................................................................. 105
6-10 XCLKIN Timing Requirements - PLL Disabled ............................................................................. 105
6-11 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ...................................................... 105
6-12 Power Management and Supervisory Circuit Solutions ................................................................... 106
6-13 Reset (XRS) Timing Requirements .......................................................................................... 108
6-14 General-Purpose Output Switching Characteristics........................................................................ 109
6-15 General-Purpose Input Timing Requirements .............................................................................. 110
6-16 IDLE Mode Timing Requirements ........................................................................................... 112
6-17 IDLE Mode Switching Characteristics ....................................................................................... 112
6-18 STANDBY Mode Timing Requirements ..................................................................................... 113
6-19 STANDBY Mode Switching Characteristics ................................................................................ 113
6-20 HALT Mode Timing Requirements ........................................................................................... 114
6-21 HALT Mode Switching Characteristics ...................................................................................... 114
6-22 ePWM Timing Requirements ................................................................................................. 115
6-23 ePWM Switching Characteristics ............................................................................................ 115
6-24 Trip-Zone input Timing Requirements ....................................................................................... 115
6-25 High-Resolution PWM Characteristics at SYSCLKOUT = (60–100 MHz) .............................................. 116
6-26 Enhanced Capture (eCAP) Timing Requirement .......................................................................... 116
6-27 eCAP Switching Characteristics ............................................................................................. 116
6-28 Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements .................................................. 116
6-29 eQEP Switching Characteristics ............................................................................................. 116
6-30 External ADC Start-of-Conversion Switching Characteristics............................................................. 117
6-31 External Interrupt Timing Requirements .................................................................................... 117
6-32 External Interrupt Switching Characteristics ................................................................................ 117
6-33 I2C Timing ...................................................................................................................... 118
6-34 SPI Master Mode External Timing (Clock Phase = 0) .................................................................... 119
6-35 SPI Master Mode External Timing (Clock Phase = 1) .................................................................... 121
6-36 SPI Slave Mode External Timing (Clock Phase = 0) ...................................................................... 123
6-37 SPI Slave Mode External Timing (Clock Phase = 1) ...................................................................... 124
6-38 ADC Electrical Characteristics (over recommended operating conditions) ............................................ 125
6-39 ADC Power-Up Delays......................................................................................................... 126
6-40 Current Consumption for Different ADC Configurations (at 12.5-MHz ADCCLK) ..................................... 126
6-41 Sequential Sampling Mode Timing ........................................................................................... 128
6-42 Simultaneous Sampling Mode Timing ....................................................................................... 129
6-43 Flash Endurance for A and S Temperature Material ...................................................................... 131
6-44 Flash Endurance for Q Temperature Material .............................................................................. 131
6-45 Flash Parameters at 100-MHz SYSCLKOUT ............................................................................... 131
6-46 Flash/OTP Access Timing .................................................................................................... 131
6-47 Minimum Required Flash/OTP Wait-States at Different Frequencies ................................................... 132
6-48 ROM/OTP Access Timing .................................................................................................... 132
6-49 ROM/ROM (OTP area) Minimum Required Wait-States at Different Frequencies..................................... 132
9-1 F280x Thermal Model 100-pin GGM Results ............................................................................... 135
9-2 F280x Thermal Model 100-pin PZ Results .................................................................................. 135
9-3 C280x Thermal Model 100-pin GGM Results............................................................................... 135
9-4 C280x Thermal Model 100-pin PZ Results.................................................................................. 135
9-5 F2809 Thermal Model 100-pin GGM Results .............................................................................. 135
9-6 F2809 Thermal Model 100-pin PZ Results ................................................................................. 136
8 List of Tables Copyright © 2003–2009, Texas Instruments Incorporated