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Philips Semiconductors Product data sheet
SC28L91
3.3 V or 5.0 V Universal Asynchronous
Receiver/Transmitter (UART)
2004 Oct 21
38
D1 D2 D8 D9 D10 D11 D12 D13
RxD
D12, D13 WILL BE LOST
DUE TO RECEIVER DISABLE.
RECEIVER
ENABLED
RxRDY
(SR0)
FFULL
(SR1)
RxRDY/
FFULL
(OP5)
2
RDN
STATUS DATA
D1
STATUS DATA
D2
STATUS DATA
D3
STATUS DATA
D10
D11 WILL BE LOST
DUE TO OVERRUN
OVERRUN
(SR4) RESET BY COMMAND
RTS
1
(OP0)
OPR[0] = 1
NOTES:
1. Timing shown for MR1[7] = 1.
2. Shown for OPCR[4] = 1 and MR[6] = 0.
SD00156
Figure 15. Receiver Timing
TRANSMITTER
ENABLED
TxD
ADD#1
TxRDY
(SR2)
WRN
MR1[4:3] = 11
MR1[2] = 1
1
BIT 9
D0 0
BIT 9
ADD#2 1
BIT 9
MASTER STATION
ADD#1MR1[2] = 0 D0 MR1[2] = 1 ADD#2
RxD
ADD#1 1
BIT 9
D0 0
BIT 9
ADD#2 1
BIT 9
PERIPHERAL STATION
0
BIT 9
0
BIT 9
RECEIVER
ENABLED
RxRDY
(SR0)
RDN/WRN
MR1[4:3] = 11
ADD#1
STATUS DATA
D0
STATUS DATA
ADD#2
SD00096
Figure 16. Wake-Up Mode