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Pin No.
Pin Name
I/O Description
39
FFCLR
O
Input latch output for starting signal to the MPC18A31FTA (IC901)
40
SLEEP
O
System sleep control signal output to the MPC18A31FTA (IC901) “H”: sleep on
41
TSB EDGE
I
TSB slave edge detect signal input terminal
42 GND SW O Ground line switching signal output terminal
43
XRST
I
System reset signal input from the MPC18A31FTA (IC901) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
44
VSS
—
Ground terminal
45 XTAL O
Main system clock output terminal (16.9344 MHz)
46 EXTAL I
Main system clock input terminal (16.9344 MHz)
47 VDD
—
Power supply terminal (+2.4V)
48 TSB SLV CTL
I/O
Two-way control signal bus with TSB slave circuit
49
SPDL START
SW
O Spindle servo start switching signal output to the analog switch (IC504, 505)
50
OPEN CLOSE
SW
I
Upper panel open/close detect switch (S801) input terminal (A/D input)
“L”: upper panel close, “H”: upper panel open
51 XSHOCK I Recording shock detect signal input from the CXD2660GA (IC502)
52
FOK
I
Focus OK signal input from the CXD2660GA (IC502) “H”: is input when focus is on (“L”: NG)
53
SQSY
I
Subcode Q sync (SCOR) input from the CXD2660GA (IC502)
“L” is input every 13.3 msec Almost all, “H” is input
54
DQSY
I
Digital In U-bit CD format subcode Q sync (SCOR) input from the CXD2660GA (IC502)
“L” is input every 13.3 msec Almost all, “H” is input
55
XINT
I
Interrupt status input from the CXD2660GA (IC502)
56 T.MARK I T MARK switch (S803) input terminal
57
REC WBL SW
O
Stable control signal is output when recording
58
SERON
O
Series power supply control signal output to the MPC18A31FTA (IC901)
59 XCHG O Charge control signal output to the MPC18A31FTA (IC901)
60
XTEST
I
Setting terminal for the test mode “L”: test mode, normally: fixed at “H”
61
SET CODE0
I
Destination setting terminal Fixed at “L” in this set
62
SET CODE1
I
Destination setting terminal Fixed at “L” in this set (US, canadian model: Not used (open))
63
SET CODE2
I
Destination setting terminal Fixed at “L” in this set (US, canadian model: Not used (open))
64
REG CTL PWM
O
Synchronizing external clock signal output to the MPC18A31FTA (IC901)
65
VRM PWM
O
VREM power supply voltage control PWM signal output to the MPC18A31FTA (IC901)
66
VC PWM
O
System power supply voltage control PWM signal output to the MPC18A31FTA (IC901)
67
SPDL PWM
O
Spindle servo drive voltage control PWM signal output to the MPC17A56FTA (IC601)
68 XIC RST O
Reset signal output to the A/D, D/A converter (IC301), SN761056ADBT (IC501) and
CXD2660GA (IC502) “L”: reset
69
REC LED
O
REC LED drive signal output terminal “H”: LED on
70 SI1 I Joint text data input from the remote commander with headphone
71 SO1 O Joint text data output to the remote commander with headphone
72
SCK1
O
Joint data communication clock output to the remote commander with headphone
73
XHOLD SW
I
HOLD switch (S804) input terminal “L”: hold on, “H”: hold off
74
VDD
—
Power supply terminal (+2.4V)
75 TEX I
Sub system clock input terminal Not used (open)
76
TX
O Sub system clock output terminal Not used (open)
77
VSS
—
Ground terminal
78 VBKAN I
Sub power supply input terminal
79 S MON I
Servo signal monitor input from the SN761056ADBT (IC501) (A/D input)