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MVE-8000A
ABCDEFGHJK
D504
D501
D502
D505
D503
D506
S901
S1201
D1204
D1203
D1202
D1201
D703
D702
D701
ND1101
ND1102
S801
S1101
ND1201
ND1202
D1104
D1103
D1102
D1101
D1004
D1002
D1003
D1001
1
2
3
4
5
6
7
8
D12
D18
D19
D14
D15
D16
D17
D10
D13
SW2
SW1
CPU-DR
Module
(CPU B)
A
B
C
D
E
F
G
654321
D12
D18
D19
D14
D15
D16
D17
D10
D13
SW2
SW1
CPU-DR
Module
(CPU A)
A
B
C
D
E
F
G
654321
2. DVP-30A board (MKE-8040A)
<LED>
D501 (A-2) :
++
++
+3.3 V
+3.3 V power supply status indication.
Lit when +3.3 V power is supplied.
D502 (A-2) :
++
++
+2.5 V-1
+2.5 V-1 power supply status indication.
Lit when +2.5 V-1 power is supplied.
D503 (A-3) :
++
++
+1.5 V-1
+1.5 V-1 power supply status indication.
Lit when +1.5 V-1 power is supplied.
D504 (A-2) :
++
++
+12 V
+12 V power supply status indication.
Lit when +12 V power is supplied.
D505 (A-2) :
++
++
+2.5 V-2
+2.5 V-2 power supply status indication.
Lit when +2.5 V-2 power is supplied.
A side/Component side
D506 (A-3) :
++
++
+1.5 V-2
+1.5 V-2 power supply status indication.
Lit when +1.5 V-2 power is supplied.
D701 (A-5) : BUS A status LED
Lit when CPU A accesses the FPGA.
D702 (A-5) : BUS B status LED
Lit when CPU B accesses the FPGA.
D703 (A-5) : READ status LED
Lit when CPU A or B makes the read access to the FPGA.
D1001 (A-7) : BOOT DONE status LED
Lit when IC108 starts up.
D1002 (A-7) : DLKD status LED
Lit when the DLL (Delay Locked Loop) of the FPGA is
locked. If the LED does not light, the FPGA may be
defective.
D1003 (A-7) : RCB DONE status LED
Lit when the FPGA configuration is complete.