Sony HCD-MD373 Stereo System User Manual


 
HCD-MD373
42
42
– BD (MD) SECTION (1/2) –
HR901
OVER WRITE
HEAD
HEAD
DRIVE
Q181,182
3
6
1
2
FILTER
PCO
FILI
FILO
CLTV
PLL
EFM,
ACIRC,
ENCODER/
DECODER
RF AGC & EQ
AGCI
RFO
MORFI
MORFO
RF AMP
1
2
BPF
P-P
AT
AMP
BPF
ADAGC
VC
ANALOG
MUX
27
16
17
18
SERIAL
PARALLEL
DECODER
VICONV
20
2522 23
4
5
6
7
8
9
IV AMP
IV AMP
E-F
BALANCE
14
15
3
VCC
VC
D101
12
11
10
LASER ON
SW
Q101
PD
APC
Q162,163
HF
MODULE
HF MODULE
SW
IC103,Q102-104
TRACKING
COIL
FOCUS
COIL
10
12
DRIVER
21
DRIVER
23
27
DRIVER
25
6
8
DRIVER
16
TFDR
PSB
XRST
SLED/SPINDLE MOTOR DRIVE
FOCUS/TRACKING COIL DRIVE
IC152
09
M
M
M902
SLED MOTOR
M901
SPINDLE MOTOR
DETECTOR
F
IJ
C
D
B
A
E
VC
LD
PD
ILCC
15 14
ATRAC
ENCODER/
DECODER
SAMPLING
RATE
CONVERTER
DTRF
CKRF
XLRF
FOCNT
79
82
81
80
93
94
95 10
SPRD
SPFD
FG IN
XRST
SPINDLE
SERVO
ADIP
DEMODULATOR/
DECODER
78
ADFG
A/D
CONVERTER
SERVO
DSP
APC
PWM
GENERATOR
21
26
25
20
SUBCODE
PROCESSOR
11
12
MONITOR
CONTROL
4
3
2
1
3
CPU
I/F
AUTO
SEQUENCER
16
27
28
7
5
6
8
9
7
3
512FS
M
M903
LOADING MOTOR
BCK
LRCK
BUFFER IC123
DRAM
IC124
SQSY
DQSY
MNT3
MNT2
MNT1
MNT0
SENS
SRDT
SCLK
SWDT
XLAT
DIN1
19
DIN0
ADDT
DADT
DOUT
91928586898883
13
RECP
APCREF
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
FOCNT
XLAT
SCLK
SWDT
CSLED
SE
TE
26
28
32
30
ADFG
ADIN
ADFM
29
31
34 66
68
75
74
FE
VC
TE
SE
33 67
36
37
35
64
63
65
AUX
BOTM
PEAK
ABCD
FE
AUX1
BOTM
PEAK
ABCD
38
RF
57
RFI
59
60
61
62
ABCD
AMP
FOCUS
ERROR
AMP
I
J
A
B
C
D
E
F
VC
CVB
TEMP
AMP
TEMPR
TEMPI
APC
APCREF
EQADJ
3TADJ
WBLADJ
TRACKING
ERROR
AMP
OPTICAL PICK-UP BLOCK
(KMS-260B/J1N)
48 47 46 40
RF AMP
IC101
EFMO
TX
XINIT
CLOCK
GENERATOR
14
15
18
19
29
30
3
4
SPFD
SPRD
SFDR
SRDR
TRDR
FRDR
FFDR
OVER WRITE HEAD DRIVE
IC181
OSCI
XBCK
LRCK
VC
VC
PEAK
&
BOTTOM
TRK–
TRK+
FSC+
FSC–
SLED+
SLED–
SPDL+
SPDL–
DIGITAL SERVO SIGNAL PROCESSOR, DIGITAL SIGNAL PROCESSOR
EFM/ACIRC ENCODER/DECODER, SHOCK-PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
IC121
DIN0
DIN1
SCTX
XINT
ADDT
DADT
DOUT
(NON CONNECT)
SQSY
DQSY
MNT3
MNT2
MNT1
MNT0
SENS
SRDT
SCLK
SWDT
XLAT CH
LDON
WRPWR
MOD
6
5
SDA
SDA
SCLSCL
LIMIT-IN
REFLECT
PROTECT
CHACK IN SW
PACK OUT SW
PLAY-P SW
REC P SW
EEP ROM
IC171
LOAD-IN
LOAD-OUT
DIG-RST
DETECT SW
S101, S102,
S601-602, 604
100
49 • 48 • 50 • 51
34 31 • 36 40 • 45
D0 D3 A00 A09
47
46
3
4
17
16
1
2
18
19
6
9
11
15
5
XWE
XRAS
XCAS
XOE
DQ1
DQ4
A0
A9
44
43
20
XWE
XRAS
XCAS
XOE
SHOCK
RESISTANT
MEMORY
CONTROLLER
8
11
10
13
9
12
4
5
DIGITAL
AUDIO
I/F
BD (MD)
SECTION (2/2)
(Page 43)
A
• R-ch is omitted
• Siganl path
: PB
: REC
: RB (Digital out)
: REG (Digital in)