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MZ-E505
• IC801 CXD2671-210GA (SYSTEM CONTROLLER, DIGITAL SIGNAL PROCESSOR, 16M BIT D-RAM)
Pin No.
Pin Name
I/O Description
1
SCS1
—
Not used
2
SI1
—
Not used
3
SO1
—
Not used
4
SCK1
—
Not used
5
78 DD CTL
—
Not used
6
MCUVDD0
—
Power supply terminal (for microcomputer block) (+1.5V)
7
MIFVSS3
—
Ground terminal (for microcomputer I/F)
8
XRST
I
System reset signal input terminal from the power control “L”: reset
9
S MON
I
Servo signal monitor input terminal (A/D input) from RF amp
10
VB MON
I
Voltage monitor input terminal of UNREG power supply (A/D input)
11
CHG MON
I
Charge voltage monitor input terminal (A/D input) Not used
12 VREF MON I Clear reference monitor voltage input terminal (A/D input) from RF amp
13 SET KEY 1 I Key input terminal from the switch & LCD module (A/D input)
14 SET KEY 2 I Key input terminal (A/D input) Not used
15 VL MON I VL voltage monitor input terminal (A/D input)
16
HIDC MON
I
HIGH DC voltage monitor input terminal (A/D input)
17
WK DET
I
Set key start switching detection signal input terminal (A/D input) Not used
18
REC KEY
I
REC key input terminal (A/D input) Not used
19
HALF LOCK
SW
I
Open/close detection switch of the upper panel input terminal “L”: when upper panel close
20
RMC KEY
I
Key input terminal (A/D input) from the remote commander attached headphone
21
AVDD
—
Power supply terminal (for the analog circuit block) (+2.3V)
22 AVSS
—
Ground terminal (for the analog circuit block)
23 VDIOSC
—
Power supply terminal (for OSC cell) (+2.3V)
24
OSCI
I
System clock (45.1584MHz) input terminal
25
OSCO
O
System clock (45.1584MHz) output terminal
26
VSIOSC
—
Ground terminal (for OSC cell)
27
DAVDD
—
Power supply terminal (for the built-in D/A converter) (+2.3V)
28
VREFL I Reference voltage input terminal (for the internal D/A converter L-CH)
29
AOUTL
O
Built-in D/A converter (L-CH) output terminal
30
AOUTR
O
Built-in D/A converter (R-CH) output terminal
31
VREFR
I
Reference voltage input terminal (for the built-in D/A converter R-CH)
32
DAVSS
—
Ground terminal (for the built-in D/A converter)
33
ASYO
O
Playback EFM duplex signal output terminal
34 ASYI I Playback EFM comparison slice level input terminal
35
AVD1
—
Ground terminal (for the analog) (+2.3V)
36
BIAS
I
Bias current input terminal for the playback EFM comparison
37
RFI
I
Playback EFM RF signal input from RF amp
38
AVS1
—
Ground terminal (for the analog)
39 PCO O Phase comparison output terminal for the playback EFM system master PLL
40
PDO
O
Phase comparison output terminal for the analog PLL Not used
41
FILI
I
Filter input terminal for the playback EFM system master PLL
42 FILO O Filter output terminal for the playback EFM system master PLL
43 CLTV I Internal VCO control voltage input for the playback EFM system master PLL
44 PEAK
I
Peak hold signal input of the light amount signal (RF/ABCD) from RF amp