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pressed. A 62 machine instruction causes the least
significant 4 bits of memory byte to be latched into U13.
These 4 bits are decoded to bring one of the 16 U13
output lines low. If the key that corresponds to this
output line is pressed, the CDPI802 EF3 input will go
low. The 4-bit codes latched into U13 correspond to the
equivalent key positions. After the program send8 a 4-bit
code to U13, it subsequently examines the EF3 line to
see if the key corresponding to this code is pressed or
not. In this manner, a program can determine when any
specific key is pressed or can sequentially scan all keys
while waiting for any one to be pressed. Key debounce
delays must be provided in the program when required.
A program can also cause a speaker tone to occur when a
key is pressed. Only one key at a time should be pressed
with this method of interfacing the keyboard.
U15 generates an audible tone when pin 4 is high. The
output on pin 3 drives a small speaker. The 10 ohm
resistor R48 in series with the speaker output can be
raised in value to lower the volume if desired. The
CDP1802 latched Q-line output drives the tone generator
and also turns on the Q light. Q can be set high (1) or low
(0) by machine language instructions. The RC network
connected to pins 2, 6, and 7 of U15 determines the
frequency of the tone. You can increase or decrease the
value of R to adjust this frequency to suit your taste.
Q is also shaped by U14A in Fig. E-3 to form a signal
suitable for recording on an audio cassette. Audio
cassette recorders can't cope with square waves. Tle
divider on the output of U 14A reduces the signal to
about 50 mV which is suitable for the microphone input
of most recorders. During recording, the operating
system program in ROM converts memory bytes into bit
serial form and transmits them to the recorder via the Q
line. See the cassette data test page of Appendix A for
the cassette data code used.
In playback, bit serial data from the cassette drives the
tape light. The serial data is amplified and shaped
RCA COSMAC VIP Instruction Manual
into 5-volt pulses by U14B. The output of U14B is
connected to the CDP1802 EF2 input line. The operating
system reads tape data by examining the timing of the
transitions on the EF2 input line. Cassette read and
record timing is derived from the crystal-controlled clock
so that no adjustments are necessary.
Video output is provided by the unique CDP1861
video display interface IC (U2 in Fig. E-1). Refer to the
CDP1861 data sheet. in Appendix G for a description of
its operation. This chip provides one of the lowest cost
and most useful display interface capabilities available
for any microcomputer. The values of the resistors RI
and R4 in Fig. E-1 of Appendix E connected to output
pins 6 and 7 of U2 can be adjusted for best results with
your video display. 61 and 69 machine language
instructions are used to generate the required on and off
pulses for U2. The down position of the RUN switch
resets the internal U2 circuits. When a program is
initiated, by flipping RUN up, U2 will remain off until a
69 instruction is executed. No CDP1802 interrupt or
DMA requests are generated by U2 until it is turned on
by a 69 instruction. U I and U2 are both driven by the
same clock. They must remain in sync to provide proper
operation of the display.
In general, the logic of this system has been kept
simple and straight-forward by the use of software to
replace hardware. This design not only yields a low cost
system, but one that should prove extremely reliable
because of the reduced number of components that can
cause failures. This system will not become obsolete for
a long time. RAM, ROM, and microprocessor are all
state-of-the-art devices and not obsolescent types that are
about to be replaced by better ones. The cassette and
video interfaces are optimum for long life. Also designed
into the system are full expansion capability for added
RAM, ROM, input, output, and full color graphics.