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Pin
No.
Mark I/O
Division
Function
62 BB I Servo A/D converter input
terminal
63 AA I Servo A/D converter input
terminal
64 AVSS1 — GND terminal
65 PEFMS I EFM signal input terminal
66 PEFM1 O EFM data slice roop filter 1
output terminal
67 EFMFIL O EFM data slice roop filter 2
output terminal
68
EFMPLLF
O Filter for EFMPLL output
terminal
69 EFMIREF I Reference voltege for
EFMPLL setting input
terminal
70 ADIP I ADIP signal input terminal
71 AVDD1 — Power supply terminal
72 MONI0 O Monitor 0 output terminal
(Not used, open)
73 RAD11 O Address for DRAM 11
output terminal (Not used,
open)
74 RAD10 O Address for DRAM 10
output terminal
75 RAD9 O Address for DRAM 9 output
terminal
76 RAD8 O Address for DRAM 8 output
terminal
77 RAD7 O Address for DRAM 7 output
terminal
78 RAD6 O Address for DRAM 6 output
terminal
79 DVSS2 — Connected to GND
80 RAD5 O Address for DRAM 5 output
terminal
81 RAD4 O Address for DRAM 4 output
terminal
82 RAD3 O Address for DRAM 3 output
terminal
83 RAD2 O Address for DRAM 2 output
terminal
84 RAD1 O Address for DRAM 1 output
terminal