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Pin
No.
Mark I/O
Division
Function
16 TVDP/
STPO1
O Traverse (+) drive signal /
stepper drive signal 1
output terminal
17 SBCK/
STPO2
O Sub code Q clock for
resistor / stepper drive
signal 2 output terminal
18 SUBC/
STPI0
I Sub code Q / stepper
status 0 input terminal
19 BLKCK/
STPI1
I Sub code block clock
signal / stepper status 1
input terminal
20 NCLDCK
/
STPI2
I Sub code flame clock
signal / stepper status 2
input terminal
21 NREC O REC / PLAY select signal
output terminal
22 DRVSEL I Driver mode select input
terminal (Connected to
GND)
23 DATA/FG I CD data / FG input terminal
24 BCK I CD bit clock input terminal
25 LRCK I CD word clock input
terminal
26 MONI4 O External ADC / DAC clock
output terminal (384FS)
27 SDAR I Audio data input terminal
28 SDAP O Audio data output terminal
(Not used, open)
29 SWS O Word clock output terminal
30 SCL O Bit clock output terminal
31 RX2 I Digital audio interface 2
input terminal (Not used,
open)
32 RX1 I Digital audio interface 1
input terminal
33 TX O Digital audio interface
output terminal (Not used,
open)
34 DVDD1 — Power supply terminal
35 DVSS1 — GND terminal
36 SGSYNC O Frame synchronous signal
output terminal
37 MDISY O Leader synchronous signal
output terminal