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MZ-NH700/NHF800
2121
MZ-NH700/NHF800
SECTION 6
DIAGRAMS
6-1. BLOCK DIAGRAM – MD SERVO Section –
8
48
47
40
41
42
23
9
35
21
32
33
7
56
1
54
55
50
51
52
49
15
14
18
19
IY
VREF
OPTICAL
PICK-UP
BLOCK
(ABX-U)
HR601
OVER
WRITE
HEAD
D
D_C
PD_I
PDO_SOURCE
C
B
A
VREF10
A_C
JY
JX
IX
IY
RFO
PEAK
BOTM
ABCD
FE
TE
ADFG
PD-NI
VREF09
SBUS
SCK
S-MON
XRESET
RF AMP, FOCUS/TRACKING ERROR AMP
IC501
M703
OVER WRITE
HEAD
UP/DOWN
17
IX
JX
JY
A
B
C
D
S0
S1
L2
TRK+
FCS+
FCS–
FCS+
FCS–
TRK–
TRK+
TRK–
101
106
107
108
109
114
153
110
225
113
252
209
210
251
142
77
84
82
60
62
169
170
164
165
166
160
232
168
167
172
216
157
156
154
155
20
19
29
30
162
163
28
48
49
50
64
1
3
54 53 52
55 238
26
46
27
25
63
62
22
23
24
21
182
IIN
PD_BUF
20
F
OVER WRITE
HEAD DRIVE
Q601, 602
MM
HB
OUTA
OUTB
CLK
EFM
EFMO
OVER WRITE HEAD DRIVE
IC601 (1/2)
RFI
TO IC801 (2/3)
(AUDIO SECTION)
145 VI N
PEAK
BOTM
ABCD
FE
TE
ADFG
VC
XRF_RST
SE
SSB_CLK
PF1/S0DO
PF2/S1DO
SSB_DATA
38
45
OFTRK
VC
123
180
VREF_MON
OFTRK
APCREF_DA
SYSTEM CONTROLLER,
DIGITAL SIGNAL PROCESSOR
IC801 (1/3)
A
CLK
SLCU
SLCV
SPCU
SPCV
SPCW
SLD MON U
SLD MON V
CLV MON U
CLV MON V
CLV MON W
SPRD
SPDL_MON
SLDW
SLDV
SRDR
SLD_MON
FRDR
FFDR
TRDR
TFDR
SPDV
SPDW
XRST_MTR_DRV
RI1
FI1
RI2
FI2
WI2
VI2
UI2
VI1
WI1
CPWO2
CPVO2
CPUO2
SLD MON W
SLD MON V
SLD MON U
STALL
UI1
PWM1
FO2
FCS–
FCS+
TRK–
TRK+
COM2
WO1
CPVI2
WO2
CPUI2
CPWI2
CPUI1
CPVI1
CPWI1
COM1
FOCUS/TRACKING
COIL DRIVE,
SPINDLE/SLED
MOTOR DRIVE
IC701
M701
(SPINDLE)
11
RF_IY
10
RF_IX
26
CLK
174 FS256_OUT
PLSE_XDC
CONT
254
272
LDPEN
XLSRCK
158
FS4
59 60 61
CPWO1
CPVO1
CPUO1
CLV MON W
CLV MON V
CLV MON U
15951 SFDR
PWM2
28945 HI_Z_SLO
ST2
2904 HI_Z_SPDL
ST1
63
175
EFM_CLK
CHOPPERCLK
56
245
LATCH
XCS_REC_DRV
69
HBB
78
HA
70
HAB
U
WV
M702
(SLED)
U
WV
171SLCW
SLD MON W
161 SPFD
NPPO
43
ADIP_IN
39
13
RF_JX
12
RF_JY
RF BUFFER
Q504
• SIGNAL PATH
: PLAYBACK
: REC
L2 B+
L1
L1 B+
VCC
REG3 B+
PVCC
REG2 B+
MVCC
MDVCC
32, 33
UO2
39, 40
UO1
9, 10
VO1
6, 7
VO2
42, 43
RO2
35, 36
FO1
16, 17
RO1
13, 14
(Page 23)