Renesas M65881AFP Stereo Amplifier User Manual


 
Rev.1.00 2003.05.08
page 7 of 23
M65881AFP
EXPLANATION OF OPERATION
DATA,BCK, and LRCK are input pins for Digital Audio Signal of CD, MD, DVD etc..
Input formats are supported by 4 ways, and are set by Serial Control, "System1 Mode, bit3 and bit4".
Input data length are selectable in a case of "MSB First Right Justified"
(Serial Control "System1 Mode,bit5 and bit6").
Input formats are shown in following figures.
LRCK
BCK
MSB
16 cycle
DATA
(16bit)
MSB
16 cycle
1/fsi, 1/2fsi, 1/4fsi
Left
Right
DATA
(24bit)
MSB
MSB
24 cycle 24 cycle
MSB
DATA
(20bit)
MSB
20 cycle
20 cycle
LSB
LSB
LSB
LSB
LSB
LSB
MSB first right justified
(16bit, 20bit, 24bit)
MSB first left justified
(24bit)
LRCK
BCK
DATA
(24bit)
Left Right
MSB
MSB
24cycle
LSB
LSB
1/fsi, 1/2fsi, 1/4fsi
24cycle
LSB first right justified
(24bit)
LSBLSB
LRCK
BCK
DATA
(24bit)
Left Right
24 cycle 24 cycle
MSB
MSB
1/fsi, 1/2fsi, 1/4fsi
I
2
S(24bit)
LRCK
BCK
DATA
(24bit)
MSBMSB
24 cycle
24 cycle
1/fsi, 1/2fsi, 1/4fsi
Left
Right
1 BCK
LSB LSB
1 BCK
1. DATA,BCK,LRCK