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Philips Semiconductors
TDA8943SF
6 W mono Bridge Tied Load (BTL) audio amplifier
Product specification Rev. 02 — 7 April 2000 4 of 20
9397 750 06865
© Philips Electronics N.V. 2000. All rights reserved.
8.1 Input configuration
The TDA8943SF inputs can be driven symmetrical (floating) as well as asymmetrical.
In the asymmetrical mode one input pin is connected via a capacitor to the signal
ground which should be as close as possible to the SVR (electrolytic) capacitor
ground. Note that the DC level of the input pins is half of the supply voltage V
CC
, so
coupling capacitors for both pins are necessary.
The input cut-off frequency is:
(1)
For R
i
=45kΩ and C
i
= 220 nF:
(2)
As shown in Equation 1 and 2, large capacitor values for the inputs are not
necessary; so the switch-on delay during charging of the input capacitors, can be
minimized. This results in a good low frequency response and good switch-on
behaviour.
Remark: To prevent HF oscillations do not leave the inputs open, connect a capacitor
of at least 1.5 nF across the input pins close to the device.
8.2 Power amplifier
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output
stage, capable of delivering a peak output current of 2 A.
The BTL principle offers the following advantages:
•
Lower peak value of the supply current
•
The ripple frequency on the supply voltage is twice the signal frequency
•
No expensive DC-blocking capacitor
•
Good low frequency performance.
8.2.1 Output power measurement
The output power as a function of the supply voltage is measured on the output pins
at THD = 10%; see Figure 8. The maximum output power is limited by the maximum
supply voltage of 12 V and the maximum available output current: 2 A repetitive peak
current.
f
i cut off–()
1
2π R
i
C
i
×()
-----------------------------
=
f
i cut off–()
1
2π 45 10
3
× 220× 10
9–
×()
-----------------------------------------------------------------
16 Hz==