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YMF744B
February 3, 1999
-5-
PIN DESCRIPTION
1. PCI Bus Interface (54-pin)
Name I/O Type Size Function
PCICLK I P PCI Clock
RST# I P Reset
AD[31:0] IO Ptr Address / Data
C/BE[3:0]# IO Ptr Command / Byte Enable
PAR IO Ptr Parity
FRAME# IO Pstr Frame
IRDY# IO Pstr Initiator Ready
TRDY# IO Pstr Target Ready
STOP# IO Pstr Stop
IDSEL I P ID Select
DEVSEL# IO Pstr Device Select
REQ# O Ptr PCI Request
GNT# I P PCI Grant
PCREQ# O Ptr PC/PCI Request
PCGNT# I P PC/PCI Grant
PERR# IO Pstr Parity Error
SERR# O Pod System Error
INTA# O Pod Interrupt signal output for PCI bus
SERIRQ# IO Ptr Serialized IRQ
CLKRUN# IO Ptr Clock Run
2. AC’97 Interface (8-pin)
Name I/O Type Size Function
CRST# O T 6mA Reset signal for AC’97
CMCLK O C 6mA Master Clock for AC’97 (24.576MHz)
CBCLK I T - AC-link: Bit Clock for AC’97 audio data
CSDO O T 6mA AC-link: AC’97 Serial audio output data
CSYNC O T 6mA AC-link: AC’97 Synchronized signal
CSDI0 I T - AC-link: AC’97 Serial audio input data (Primary)
CSDI2 I Tup - AC-link: AC’97 Serial audio input data (Secondary)
DOCKEN# I Tup - Docking Enable