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MAX9777/MAX9778
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
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11
Pin Description
PIN
MAX9777 MAX9778
NAME FUNCTION
1 — SDA Serial Data I/O
2—INT Interrupt Output
3, 4 3, 4 V
DD
Power-Supply Input
5 5 INL1 Left-Channel Input 1
6 6 INL2 Left-Channel Input 2
7 7 GAINLA Left-Channel Gain Set A
8 8 GAINLB Left-Channel Gain Set B
9, 13, 23, 27 9, 13, 23, 27 PGND Power Ground. Connect to GND.
10 10 OUTL+
Left-Channel Bridged Amplifier Positive Output. OUTL+ also serves as the
left-channel headphone amplifier output.
11, 25 11, 25 PV
DD
Output Amplifier Power Supply
12 12 OUTL- Left-Channel Bridged Amplifier Negative Output
14 14 SHDN Active-Low Shutdown Input. Connect SHDN to V
DD
for normal operation.
15 — ADD
Address Select. A logic-high sets the address LSB to 1, a logic-low sets the
address LSB to zero.
16 16 HPS
Headphone Sense Input. A logic-high configures the device as a single-
ended headphone amp. A logic-low configures the device as a BTL
speaker amp.
17 17 BIAS
DC Bias Bypass Terminal. See the BIAS Capacitor section for capacitor
selection. Connect C
BIAS
from BIAS to GND.
18 18 GND Ground. Connect to PGND.
19 19 INR1 Right-Channel Input 1
20 20 INR2 Right-Channel Input 2
21 21 GAINRA Right-Channel Gain Set A
22 22 GAINRB Right-Channel Gain Set B
24 24 OUTR+
Right-Channel Bridged Amplifier Positive Output. OUTR+ also serves as the
right-channel headphone amplifier output.
26 26 OUTR- Right-Channel Bridged Amplifier Negative Output
28 — SCL Serial Clock Line
— 1 MUTE Active-High Mute Input
— 2 HPS_EN
Headphone Enable. A logic-high enables HPS. A logic-low disables HPS
and the device is always configured as a BTL speaker amplifier.
— 15 GAINA/B
Gain Select. A logic-low selects the gain set by GAIN_A. A logic-high
selects the gain set by GAIN_B.
—28IN1/2
Input Select. A logic-low selects amplifier input 1. A logic-high selects
amplifier input 2.
EP EP EP Exposed Paddle. Connect to GND.