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2.6DigitalAudioInterface(J60)
DigitalAudioInterface(J60)
Thedigitalaudiointerfacecontainsdigitalaudiosignaldata(I
2
S),clocks,etc.PleaserefertotheTAS5518
DataManualforsignaltiminganddetailsnotcoveredinthisdocument.
Table2-8.J60PinDescription
NETNAME
PIN
ATDESCRIPTION
NO.
SCHEMATICS
1,3,10,
GNDGround
12,14,16
Masterclockinput.Low-jittersystemclockforPWMgenerationandreclocking.Groundconnection
2MCLK
fromsourcetotheTAS5518mustbealow-impedanceconnection.
3GNDGround
4SDIN1I
2
Sdata1,channel1and2
5SDIN2I
2
Sdata2,channel3and4
6SDIN3I
2
Sdata3,channel5and6
7SDIN4I
2
Sdata4,channel7and8
8,9,15—Reserved
11SCLKI
2
Sbitclock
13LRCLKI
2
Sleft-rightclock
SystemInterfaces 16SLEU074–June2006
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