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4.11ExternalMemoryInterface(EMIF)
4.11.1EMIFDevice-SpecificInformation
TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268E–MAY2005–REVISEDJANUARY2007
TheC672xDSPincludesanexternalmemoryinterface(EMIF)foroptionalSDRAM,NORFLASH,NAND
FLASH,orSRAM.ThekeyfeaturesofthisEMIFare:
•Onechipselect(EM_CS[0])dedicatedforx16andx32SDRAM(x8notsupported)
•Onechipselect(EM_CS[2])dedicatedforx8,x16,orx32NORFLASH;x8,x16,orx32Asynchronous
SRAM;orx8orx16NANDFLASH
•Databuswidthis16bitsontheC6726andC6722,and32bitsontheC6727
•SDRAMburstlengthof16bytes
•ExternalWaitInputontheC6727throughEM_WAIT(programmableactive-highoractive-low)
•ExternalWaitpinfunctionsasaninterruptforNANDFlashsupport
•NANDFlashlogiccalculatesECConblocksofupto512bytes
•ECClogicsuitableforsingle-biterrors
Figure4-5andFigure4-6showtypicalexamplesofEMIF-to-memoryhookupontheC672xDSP.
Asthefiguresillustrate,theC672xDSPincludesalimitednumberofEMIFaddresslines.Theseare
sufficienttoconnecttoSDRAMseamlessly.AsynchronousmemorysuchasFLASHtypicallywillneedto
useadditionalGPIOpinstoactasupperaddresslinesduringdevicebootupwhentheFLASHcontents
arecopiedintoSDRAM.(Normally,codeisexecutedfromSDRAMsinceSDRAMhasfasteraccess
times).
Anypinslistedwitha‘Y'intheGPIOcolumnofTable2-12maybeusedforthispurpose,aslongasitcan
beassuredthattheybepulledlowat(andafter)resetandheldlowuntilconfiguredasoutputsbythe
DSP.
NotethatEM_BA[1:0]areusedaslow-orderaddresslinesfortheasynchronousinterface.Forexample,in
Figure4-5andFigure4-6,theflashmemoryisnotbyte-addressableanditsA[0]inputselectsa16-bit
value.ThecorrespondingDSPaddresscomesfromEM_BA[1].Theremainingaddresslinesfromthe
DSP(EM_A[12:0])driveawordaddressintotheflashinputsA[13:1].
ForamoredetailedexplanationoftheC672xEMIFoperationpleaserefertothedocument
TMS320C672xExternalMemoryInterface(EMIF)User'sGuide(literaturenumberSPRU711).
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