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A.2InterfacingtoDSPs
DSP
SCKI
BCK
LRCK
DOUT
PCM3793A
AudioInterface
Clock
Manager
ADC
DAC
DSP
SCKI
BCK
LRCK
DOUT
PCM3793A
AudioInterface
Clock
Manager
ADC
DAC
InterfacingtoDSPs
RefertothefollowingexamplesforinterfacingthePCM3793Atoadigitalsignalprocessor(DSP)ineither
slaveormastermode.Toimplementmastermode,MSTR=1ofregister84(54h)enablesmastermode
operationasdiscussedintheproductdatasheet.Insert5440htotherecommendedpower-onsequence
afterDACpower-up(49h)ofPCM3793A,asnotedinTableA-2.
ExampleA-1.SlaveModeOperation
FigureA-24illustratestheproperconfigurationforslavemodeoperation.
FigureA-24.SlaveModeOperation
ExampleA-2.MasterModeOperation
FigureA-25illustratesthecorrectinterfaceformastermodeoperation.
FigureA-25.MasterModeOperation
Where:
•SCKI:Audioclock(256f
S
/384f
S
)
•BCK:Clockforaudiotransfer(32f
S
/48f
S
/64f
S
)
•LRCK:Samplingrateclock(f
S
)
•DIN:AudiodatainputforDAC(I
2
S,Left-Justified,Right-Justified,DSP)
•DOUT:AudiodataoutputfromADC(I
2
S,Left-Justified,Right-Justified,DSP)
98Reference.csvFiles,InterfacingtoDSPs,andPackageInformationSBAU127–July2007
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