SMSC - Standard Microsystems LAN9312 Manual

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Revision 1.4 (08-19-08) 250 SMSC LAN9312

DATASHEET

14.2.8.3 Virtual PHY Identification MSB Register (VPHY_ID_MSB)

This read/write register contains the MSB of the Virtual PHY Organizationally Unique Identifier (OUI).

The LSB of the Virtual PHY OUI is contained in the Virtual PHY Identification LSB Register

(VPHY_ID_LSB).

Note 14.23 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on

a DWORD boundary. When accessed serially (through the MII management protocol), the

register is 16-bits wide.

Note 14.24 IEEE allows a value of zero in each of the 32-bits of the PHY Identifier.

Offset:

Index (decimal):

1C8h

2

Size: 32 bits

BITS DESCRIPTION TYPE DEFAULT

31:16 RESERVED

(See Note 14.23)

RO -

15:0

PHY ID

This field contains the MSB of the Virtual PHY OUI (Note 14.24).

R/W 0000h